Sep 28, 2017 term paper 2

IN THE ECL CIRCUIT IN FIGURE P17.9, THE OUTPUTS HAVE A LOGIC SWING OF 0.60 V, WHICH IS…

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In the ECL circuit in Figure P17.9, the outputs have a logic swing of 0.60 V, which is symmetrical about the reference voltage. Neglect base currents. The maximum emitter current for all transistors is 0.8 mA. Assume the input logic voltages I are compatible with the output logic voltage. Determine all resistor values.



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